Thursday, 18 August 2016

ONE DAY WORKSHOP On VLSI DESIGN FLOW AND FPGA ARCHITECTURE 30th August KONGU ENGINEERING COLLEGE

ONE DAY WORKSHOP On VLSI DESIGN FLOW AND FPGA ARCHITECTURE 30th August KONGU ENGINEERING COLLEGE

College  Name: KONGU ENGINEERING COLLEGE
Organizing Department:  Department of Electronics & Instrumentation Engineering
Event Date:  30-08-2016
Last Date: 24.08.2016
Address: Perundurai

College  Website Link:  www.kongu.ac.in

Event / Brochure Website Link: www.kongu.ac.in/events/eievlsi.pdf

Email Address: kalavathidevi@gmail.com , kecmadhanmohan@gmail.com

OBJECTIVE

          Dear Viewers KONGU ENGINEERING COLLEGE Conducting Workshop.VLSI Applications form the key to many emerging systems of modern technology. Today there are several applications where FPGAs can provide better solutions than ASICs and conventional microprocessors. With the advent of FPGAs we have entered the era of reconfigurable computing.

        FPGAs act as a sort of system-level silicon super-glue, sitting at the periphery of the circuit board making anything to connect to anything else, so that we could adapt on the fly and change our design to leverage any new, improved component without having to abandon the rest of the design.

COURSE TOPICS
  •  FPGA architecture and design flow
  •  Behavioral and structural description for design representation and design entry
  •  Design and simulation of digital circuits using Xilinx ISE
  •  FPGA specific structural optimization with respect to speed and area
  •  Configuration bitstream generation for actual implementation on FPGA
  •  Integrate Xilinx System Generator with MATLAB/Simulink and explore model based design approach using Xilinx FPGA’s
ELIGIBILITY

Faculty from AICTE approved Engineering Colleges Polytechnics, UG and PG students.

REGISTRATION DETAILS

Registration Fee*(Including Service Tax)
Rs.800/-(Faculty members & Industry persons)
Rs.500/- (PG/UG Students)

The course fee includes course material, lunch and refreshment. Registration for the course can be made by sending the duly filled registration form along with a DD - in favour of “IIP Cell grant in Aid A/c”, payable at Perundurai, Erode.

Accommodation will be provided on chargeable basis to the participants.

HOW TO APPLY

The applicants should send their applications in the specified format to reach us on or before 24.08.2016. If selected they should confirm their participation in time.

SCHEDULED DATES

Last Date for Receipt of Applications : 24.08.2016
Confirmation of selected participants : 26.08.2016

Application form completed in all respects is to be sent to:

The Convenor

Workshop on “VLSI DESIGN FLOW AND FPGA
ARCHITECTURE”
Department of EIE
Kongu Engineering College
Perundurai, Erode -638052. Tamil Nadu
Mobile: 9942155300, 9976325608, 9363067473
Email id: kalavathidevi@gmail.com
kecmadhanmohan@gmail.com

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